1. Field of the Invention
The present invention relates to a voltage regulator including an overcurrent protection circuit.
2. Description of the Related Art
A conventional voltage regulator is described. FIG. 3 is a diagram illustrating the conventional voltage regulator.
When an output voltage Vout is higher than a predetermined voltage, that is, when a divided voltage Vfb of a voltage dividing circuit 91 is higher than a reference voltage Vref, an output signal of an amplifier 92 (gate voltage of an output transistor 84) is so high that the output transistor 84 approaches an OFF state. Then, the output voltage Vout decreases. On the other hand, when the output voltage Vout is lower than the predetermined voltage, in a similar way to the above, the output voltage Vout increases. Thus, the output voltage Vout becomes constant.
In this case, it is assumed that an output terminal and a ground terminal of the voltage regulator are short-circuited. Then, an output current Iout increases to a maximum output current Im. In accordance with the maximum output current Im, a current flowing through a sense transistor 83, which is current-mirror-connected with the output transistor 84, increases. On this occasion, a P-type metal oxide semiconductor (PMOS) transistor 82 is in an ON state, and hence a voltage generated across a resistor 87 alone increases so that an N-type metal oxide semiconductor (NMOS) transistor 85 approaches an ON state. Then, a voltage generated across a resistor 86 increases so that a PMOS transistor 81 approaches an ON state. Then, a gate-source voltage of the output transistor 84 decreases so that the output transistor 84 approaches the OFF state. Accordingly, the output current Iout is prevented from exceeding the maximum output current Im and is fixed to the maximum output current Im, and hence the output voltage Vout decreases. In this case, based on the voltage generated across the resistor 87 alone, the gate-source voltage of the output transistor 84 decreases so that the output transistor 84 approaches the OFF state and the output current Iout is fixed to the maximum output current Im. Therefore, the maximum output current Im is determined based on a resistance value of the resistor 87 alone.
When the output voltage Vout decreases, and then a gate-source voltage of the PMOS transistor 82 becomes lower than an absolute value Vtp of its threshold voltage, the PMOS transistor 82 is turned OFF. Then, a voltage generated across not the resistor 87 alone but both the resistors 87 and 88 increases so that the NMOS transistor 85 further approaches the ON state. Then, the voltage generated across the resistor 86 further increases so that the PMOS transistor 81 further approaches the ON state. Then, the gate-source voltage of the output transistor 84 further decreases so that the output transistor 84 further approaches the OFF state. Accordingly, the output current Iout reduces to a short-circuit output current Is. After that, the output voltage Vout decreases to 0 V. In this case, based on the voltage generated across both the resistors 87 and 88, the gate-source voltage of the output transistor 84 decreases so that the output transistor 84 approaches the OFF state and the output current Iout becomes the short-circuit output current Is. Therefore, the short-circuit output current Is is determined based on resistance values of both the resistors 87 and 88 (see, for example, JP 2003-216252 A (FIG. 5)).
In the conventional technology, in order to accurately set the maximum output current Im and the short-circuit output current Is with respect to the output current Iout, a trimming process for the resistance values of both the resistors 87 and 88 is required because the maximum output current Im and the short-circuit output current Is are determined based on the resistance values of both the resistors 87 and 88. As a result, there arises a problem that a manufacturing process for the voltage regulator may be complicated correspondingly thereto.